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W-B-N diffusion barriers for silicon copper metallizations

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Reactively sputtered from W2B target, amorphous W-B-N thin films are investigated. Physical properties of films, namely density, resistivity, crystallisation behaviour and reaction temp. with Si, are given as functions of composition. Additionally, films are assessed as diffusion barriers between Si substrates and Cu overlays. By I(V) measurements of shallow- junction diodes, a 100 nm W64B20N16 barrier prevents Cu from reaching Si during an 800°C, 30 min heat treatment in vacuum. W79B21 films are able to prevent diffusion into diodes only up to 500°C. High resolution transmission electron microscopy shows that W64B20N16 and W79B21 films are both marginally amorphous with local ordering < 1.5 nm.

Waer and climate changes - how much do we know ?

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Overview, with graphs showing past data, of rainfall, flooding both actual and computer modelled and comments on global warming etc. Sourced from; Zeitschr. Umwelt 12/96.

Wafer Backside Electrical Contact for Electrodeposition and Electrochemical Mechanical Polishing.

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Electrochemical cell for carrying out title process sequence.

Wafer bias ring in self-sputtering reactor

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Wafer Boat for Chemical Vapour Deposition

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Wafer carrier ring apparatus for chemomechanical polishing

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Wafer cleaning apparatus

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Wafers in cassette are cleaned by flowing cleaning soln downward through tank containing cassette to clean wafers; removing cassette and at this time flowing soln upwardly through tank to rinse wafers.

Wafer coating apparatus

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Sheet, e.g., of Si wafers, is placed across top of cylindrical nozzle through which coating liquid passes to form uniform liquid film of liquid dispersed over sheet disperser being propeller on shaft supported by bearings.

Wafer Edge Deposition Elimination

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This invention provides a method and apparatus for substantially eliminating deposition on the edge of a wafer supported on a pedestal in a processing chamber. Process gas flow onto the wafer surface is inhibited from reaching the wafer edge and backside, by means of a shadow ring placed over the wafer without touching it. Deposition on the edge and backside of the wafer are therefore substantially eliminated. The shadow ring defines a cavity which circumstances the wafer edge, into which purge gas is flowed. This purge gas flows out from the cavity through the gap between the shadow ring and the upper surface of the wafer. Alignment pins are placed on the wafer supporting surface of the pedestal. These pins have sloping surfaces and are arranged to guide the wafer to a centered position on the pedestal when the wafer is placed on the pedestal. These pins also serve to align the shadow ring to the pedestal and thence to the wafer. The shadow ring has a plurality of keyed formations which mate to the pins, and as the shadow ring and pedestal are brought together, the pins serve to align the shadow ring. This precise rotational alignment and centering of the shadow ring results in substantial elimination of edge deposition. The keyed formations have elliptical cross-sections to provide for radial movement of the pins with respect to the keyed formations due to thermal expansion.

Wafer edge deposition inhibition

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Wafer etching apparatus

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Wafer etching system

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System comprising means for determining thickness profile data and for generating dwell time vs position map for wafer; and means for removing material controlled by map.

Wafer etching system

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System comprising means for determining thickness profile data and for generating dwell time vs position map for wafer; and means for removing material controlled by map.

Wafer handling apparatus in vacuum chamber using vacuum

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Wafer Level Three Dimensional Integration Technology

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